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Feb 19, 2011

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Tell Us About You/Your Company or What Type of Work You Do if Seeking Employment: System, ASIC, FPGA, PCB, embedded design and verification/validation.

Your Website or Blog Address: http://www.linkedin.com/in/garyaneal

Post Your Resume (Remove Your Home Address, Phone and all Personal Information ie. SSN, DOB, DL#****Failure to Comply will result in your account being banned! This is not a site for commercial advertising. If you are not looking for employment you need to be a Sponsor. Click on the Advertising Tab for more information!) Protect Your Privacy and DO NOT POST YOUR PHONE NUMBER OR HOME ADDRESS. YOUR RESUME WILL POST TO THE INTERNET - DO NOT PUT ANYTHING ON YOUR RESUME THAT YOU DO NOT WANT OTHERS TO SEE!: Gary Neal

Electrical/Computer Hardware Engineering Professional highly successful in Developing and Managing electronic products and projects for both Startup and Fortune 500 companies. Diverse and Extensive experience in creating a wide range of electronic devices. Led and Participated in the Development Process including Definition, Architecture, Design (RTL/Schematic Capture), Synthesis, Simulation, Timing Analysis, Validation, Bring-up, Debug, Verification, DFT, DFM, EC for RTM, FA and Field Support. Experience with multiple programming languages.

* Recognized for leading teams to pioneer new technologies from protocols and interfaces to multiple chip architectures.
* Actively coached and developed staff by effectively mentoring and training colleagues and junior co-workers. Instructed use of Design tools, Demonstrated development skills and methodologies, and Transferred current job information to all levels of personnel.

TECHNICAL

* Programming Languages: VHDL, Verilog, C, Perl, Shell Scripting, Assembly Language, Firmware
* DEV Tools: IBM (synthesis/simulation/static timing), Altera/Xilinx (FPGA/CPLD), LeonardoSpectrum, Synplicity, Modelsim, Cadence (Concept, Allegro, XL/NC simulators), OrCad, Mentor Graphics, MS Office
* Hardware: ASIC, FPGA, PCB, CPU (PowerPC, Arm, X86), 2D/3D GPU, SDRAM-DDR1/2/3, MIPI DigRF V4 Serial Bus, PCI/PCI-X/PCI-E, Microchannel, EISA, VESA, Fibre Channel, SCSI, USB, SAS, SATA, Ethernet, RS-232, IDE/EIDE, SPI, I2C, DVI, IBIS, 8051, Microcontrollers

EXPERIENCE

DELL, Round Rock, TX 2010 - 2010
Dev Engineer
* Develop Rack/Tower Servers at the PCB level using Cadence Allegro tools.
* Determine root cause of Server failures then devise and implement solutions.
* Innovate new features and Maintain Server BMC explicitly iDRAC using Windows, Linux and IPMI.
* Oversee component qualification.
* Support Hardware Functions CPU, Memory, PCIE, SAS, SATA, Ethernet, USB, JTAG, etc.

MOTOROLA, Austin, TX 2006 – 2009
Senior Digital Design Engineer
* Led Test Development, Validation, Debug, and Verification for MIPI DigRF V4 High-Speed Serial Bus.
* Develop 3G/4G Technology including WiMax and LTE.
* Performed Architecture, Logic Design, and Schematic Capture of mixed signal reference designs and platforms for mobile devices.
* Designed digital portion of a mixed signal reference platform for a mobile telephone with both GSM and CDMA technology.

IBM, Austin, TX 2005 - 2006
Design Engineer (Contract)
* Perform Bring-up, System Integration, and Verification of High Speed UNIX/Linux based Server Blades.
* Required understanding of architecture, system design, thermal, acoustics, and mechanical constraints along with detailed knowledge of all system functions.

NETEFFECT, Austin, TX 2004 - 2005
Hardware Engineer (Contract)
* Mapped Gb Ethernet ASIC Verilog RTL to Altera FPGA's on emulation board for IC Verification.
* Synthesized Verilog RTL using Synplicity, performed FPGA floor planning and timing analysis using Altera tools, and generated development scripts using Perl.

CLEARCUBE TECHNOLOGY, Austin, TX 2002 - 2004
Senior Development Engineer
* Designed VHDL RTL for extended USB interface between PC Blade and User Port; USB interface designed using Altera FPGA’s with embedded microcontroller. Programmed microcontroller using assembly language/firmware; Performed OrCad schematic capture of System PC Board’s.
* Validated FPGA’s using Modelsim with VHDL test benches.
* Led Bring-up/Debug, Verification, FA and Field Support.

CROSSROADS SYSTEMS, Austin, TX 2000 - 2002
Senior Hardware Engineer
* Designed Verilog RTL for multiple PCI to PCI Bridge Altera FPGA’s for various Storage Routers; the Bridges also included an SDRAM memory controller for temporary data storage.
* Validated each Bridge version using Cadence XL/NC simulators with Verilog test benches.
* OrCad and Mentor Graphics used for schematic capture of SAN PCB's.
* Led Bring-up, Debug, Verification, FA and Field Support.

IBM, Austin, TX Through Start of 2000
Advisory Engineer
* Maintain GPU validation tool using C.
* Designed RTL Integrating external RAMDAC into a 3D GPU ASIC.
* Led Validation, DFT, DFM and Tape-out of GPU ASIC's.
* Developed multiple 2D/3D GPU ASIC's.
* Designed RTL and Verified a VGA controller as a module of a GPU ASIC.
* Led effort to design a PowerPC to PCI Bridge ASIC to extend the life of a graphics adapter.
* Developed Architecture incorporating a GPU, Frame Buffer Memory and RAMDAC into a single IC.
* Designed Load/Store Units for RISC CPU tailored to execute GPU instructions.
* Led Development of System Boards including Native I/O and Procurement effort for Memory Cards from both Far East and Domestic sources for UNIX/AIX based workstations/servers.

* BS, Electrical/Computer Engineering, UNM